1. Field of the Invention
The present invention relates generally to a stacked structure of a semiconductor package and more particularly to two chips attached to a substrate by means of flipchip bonding.
2. Description of the Related Art
A stacked structure is a high density and performance packaging technique. If chips can be packaged more densely on the surface of the substrate, the dimension of the stacked structure can be reduced. Recently other stacking concepts have been developed. One possible way of minimizing the dimension of packaging involves placing leads in the appropriate spaces.
U.S. Pat. No. 5,861,668, issued on Jan. 19, 1999 to Cha, discloses a semiconductor package including a paddle layer having a metal wiring pattern formed therein, semiconductor chips bonded on at least one surface of the paddle layer. A plurality of wires electrically connecting a plurality of chip pads formed on the semiconductor chips with the paddle layer. Each lead includes a first lead bonded to a surface of the paddle layer and a second lead, which is at least partially exposed. A conductive adhesive bonds the paddle layer to the first lead and a molding resin comprises the body of the package. The semiconductor package of the above construction has various advantages compared to conventional packages. The occupying area rate can be minimized and an undesired curving of the lead can be prevented. Further, since the semiconductor chip can be bonded on both surfaces of the paddled layer, an integrated semiconductor package can be achieved. As shown in FIG. 1, the semiconductor package of U.S Pat. No. 5,861,668 includes a first chip 101, a second chip 102, a paddle layer 103 and a lead frame 104. The first chip 101 and the second chip 102 are attached on the surface of the paddle layer 103 by a plurality of solder bumps 106 by means of flipchip bonding. Then, the first chip 101, the second chip 102 and the paddle layer 103 form a stacked structure. A plurality of fingers (not labeled) of the substrate 103 is provided along an edge of the paddle layer 103. The fingers are stacked and connected to the lead frame 104 by silver paste to form a semiconductor device in such a way that the first chip 101 and the second chip 102 electrically connect to the lead frame 104. In addition, the lead frame 104 is bent to form a plurality of fingers 105, which is placed under the stacked structure while it is assembled. An encapsulant 107 covers the stacked structure, then the fingers 105 are exposed on the surface of the encapsulant 107, so that the first chip 101 and the second chip 102 can be operated by means of the fingers 105. However, the stacked structure is stacked on the lead frame 104, and the leads of the semiconductor package form a space that can contain the wires, so that the thickness or the dimensions of the semiconductor package cannot be reduced.
The present invention intends to provide a stacked structure having a space where can contain leads in such a way as to mitigate and overcome the above problem.